Memory Performance Analyzer
By Nelson Ijih
Question-1:How long of a wait does a CPU core has to wait for data to become available to it when there is a Cache-Miss & Page Fault for a given memory access?
Question-2:Will the answer in 1 above( "the wait time") depends on Cache size,Page Size,replacement alogorithm used for Cache lines Page frames,and many other parameters.?
Question-3: Could it be that it is possible for the OS virtual memory manager to determine (on the fly) when and what parameters mentioned in question-2 above
to be used in certain conditions by the virtual memory manager?
Question-4: Could it be that it is possible for a dedicated reconfigureable 'functional unit' within the CPU core that can also determine(on the fly) when and what parameters mentioned in question-2 above to be used in certain condition by the cache controller?
This project will (hopefully) provide some statistical analysis,primarily answering question-1 above,and later the rest of questions 2 to 4... :)
MPA (Memory Performance Analyzer) is a simulator aimed at providing an approximate estimation of how much CPU cycles incured because of memory accesses
generated by a program. The simulator is broken into two core co-simulators namely:
- 1. Cache Simulator (Written in C++)
- 2. Virtual Memory Manager Simulator (Written in Java)
... A little more details
1. Cache Simulator
This simulator implements an L1 Data cache allowing a user to specify certain parameters listed below:
- Cache Size in bytes or simulator defaults to 8K bytes
- Set Associativty or will default to 4-way set associative
- Data distribution in cache(i.e: Round Roubin,e.t.c) or defaults to Round Robin cyclical distribution
- Replacement alogirthm or simulator will default to Least Recently Used
The input to this simulator is an ASCII text file that contains series of memory accesses.
2. Virtual Memory Manager Simulator
This is a simulation of a virtual memory management subsystem, simulating a virtual memory
system whose architecture is a 32 bit computer that is byte addressable with 4-byte integer
words. The VMM simulator simulates a real VMM system but actual data will not be acted on.
The system will simulate page faults, swap out and swap in operations.
Why Do This?
- To provide a performance analysis based of varying parameters to the simulator
- To present a graphical comparative analysis between different parameter sets .
Deliverables
- Performance Analyzer source code
- Sample Usage cases
- Auto graph plotting routine will show performance analysis for a given test case.
Schedule
- 7/4/09 - Setup Code repository,documentation ....Done
- 7/8/09 - Add wrapper code around the cache/vmm simulator and test ...done
- 7/15/09 - Complete implementation of parameter options to cache/vmm simulators ....in progress
- 7/22/09 - Add auto graph plotting functionality ....Pending
- 7/29/09 - Test the MPA code ....Pending
- 1st week of Aug'09 - Presentation....Pending
Details.